Dave's 'Diatribes'

Signal processors go head over heels for Core i7

Jan., 2010
By: dl 

The new members of Intel’s Core i7 microprocessor family  introduced at this month’s Consumer Electronics Show have created quite a stir in the embedded computing community. In his blog, John Keller, editor-in-chief of Military & Aerospace Electronics magazine, suggests that there “may be a tectonic shift” under way that would displace PowerPCs with i7s. 

“While Intel sees the floating point capability of its Core i7 processor as the gateway to a new generation of complex graphics and fast streaming video,” Keller writes, “military systems designers see it as the latest and greatest way to implement signal processing for advanced radar, sonar, electronic warfare, and electro-optical applications with commercial off-the-shelf (COTS) single-board computers.” 

He notes that Curtiss-Wright Controls Embedded Computing, GE Intelligent Platforms, and Extreme Engineering Solutions Inc. all announced i7-based SBCs “within hours of Intel’s introduction.” I’m not quite sure of the exact timing, but Concurrent Technologies and Kontron also bellied up to the i7 bar in short order, and others are sure to follow. 

The SBC makers’ praise of the new Intel entry is enthusiastic, indeed, perhaps even a bit over the top. GE Intelligent Platforms, for example, claims “remarkable performance” for its i7-based boards. “The increased integration and increased density of this new family of processors from Intel offers us astonishing new opportunities,” said Peter Cavill, GM for military and aerospace products at the company. 

And, according to Dirk Finstel, CTO of Kontron AG, that company’s i7 entry represents “the ultimate computing tool MAG HPEC users have been waiting for, allowing them to finally walk away from 10 years of PowerPC Altivec dominance in radar, sonar and imaging applications.” 

Indeed, Freescale and the PowerPC architecture may have become vulnerable in high-end signal processing applications that hear the clarion cry of Intel’s Streaming SIMD Extensions. And Freescale may have lost some of its fans by leaving Altivec out of its newest CPU core (See End of Altivec PowerPC digital signal processing chip spells headache for Serial RapidIO designers), while in some signal processing arenas, PowerPCs have been replaced by designs based on FPGAs.  

On the other hand, old timers in the arena recall Intel’s on-again, off-again love affair with the embedded world, with buses such as Multibus II that went from prince to frog in short order, microprocessors such as the i960 that quickly went from star to red-headed stepchild within a decade and other such items. Is Intel in it for the long haul this time? 

Who knows. But in the meantime, let the i7 games begin! 

 

   *******************************************

Introducing Open Architecture Review:
The Ray, Dave, Loring and Terry Show
8/3/09

We’re back, “we” being three editorial caballeros from the former glory days of EETimes, plus one benign sage named Ray Alderman (very Gandalf like), who stands at the tiller as publisher and editorial director.* You may aptly call us old timers. If you add up the ages of the three editors alone–Loring Wirbel, Terry Costlow and myself (David Lieberman)—-you’ll get to more than 1000 dog years, and I think we have spent about 90 man years among us researching and writing about embedded computing and other hi tech arenas.

We’re hoping that our new creation, Open Architecture Review, is the right kind of pub for this turbulent era of journalism in crisis. The old business models of print journalism are failing, crushed in part by newer on-line models, which are as yet anything but mature. In this era of rapid (and often vapid) electronic proliferation and regurgitation of the written word, what kind of publication makes sense? we asked ourselves. What sort of webpub, ezine, or whatever you call it would offer real value?

A window, we answered. A funnel. A review. The mission of Open Architecture Review, then, is to funnel a mass of newsworthy information to you in short bites, packaged with the hot links to get you to a more complete story, if it’s of interest to you. The efficient use of your reading time is our goal.

Simultaneously, we will be building our archives and library with various kinds of resource materials, including reviews of white papers and current magazine articles, value-added features, research results and analyses, debates, interviews, application snapshots, charts, tables, reference lists, etc., hoping to eventually become your first stop on the Internet for reading about embedded computing. Even when we provide more or less conventional editorial content, we’ll keep it pithier than the norm to optimize your reading-time investment and let you know where to go to explore further.

Open Architecture Review is kicking off with very modest offerings, but we will evolve over time, becoming both deeper and broader, and we’d like that evolution to be flexible and interactive.  As we begin this journey together to create a new kind of epub, know that you are always welcome to suggest directions, projects and topics of interest to our editorial staff. 

Dave Lieberman

Editor

_______________________________

*We are very aware that “caballeros” and “tiller” together represent a mixed metaphor. That is, the three editors should be “sailors” (to mesh logically with “tiller”), OR Ray should be holding the “reins” (to go with “caballeros”). But the editor says he actually likes mixed metaphors and, anyway, he won’t let ANYONE change his copy.

*****************************************************

Calling all geeks!

by: dl
Sept. 21, 2009
I started a project early this century which turned into one of those never finished projects we all regret. I have long since forgotten what I was trying to figure out by creating the chart, but I’m sure it was a very worthy research question.

I started making a chart of the generations of microprocessors over time and mapped those against the generations of system interfaces, entitling the thing Microprocessor Milestones, although my real interest was in buses. Well, I stopped keeping track some time ago and still had some blank entries for earlier years, so the chart was never complected, which brings us to today.

Would you join me in a collaborative endeavor to fill out the historical picture in my chart?   In exchange for your help, I will not ask you to buy girl scout cookies from my daughter, rent my time share or give to my favorite charity. Instead, please make your contributions to Microprocessor Milestones at dl@oareview/com. (Actually, the whole chart won’t fit in this format, so it’s broken down into 3 subcharts covering Intel micros, Motorola/Freescale micros and system interfaces).

Not motivation enough? Alright, let’s make this a contest. Whoever out there contributes the most data points to the chart will win a genuine VAX BI interface chip (the original) from the late, great Digital Equipment Corp., encased in a genuine Lucite paperweight.

Thanks in advance for your participation. Give early and give often. It’ll be interesting to see if the move to multi-core processors maps to the appearance of any new or modified system interfaces. If this collaborative chart scheme works, we’ll add in peripheral interfaces next!

Microprocessor Milestones
A. Intel micros

Year Intel Micros (Max frequency)

1974 2 MHz 8080 (8 bit)

1975

1978 5 MHz 8086 (16 bit)

1979

1980

1981

1982 12 MHz 80186 (16 bit)

1984 12 MHz, 80286 (16/32-bit)

1985 16 MHz 80386 (16/32-bit)

1986

1987 33 MHz 80386

1988

1989 25 MHz 80486

1990 33 MHz 80486

1991 50 MHz 80386 and 80486

1992 66 MHz 80486

1993 66 MHz Pentium (32/64 bit)

1994 100 MHz 80486 and Pentium

1995 133 MHz Pentium; 200 MHz Pentium Pro

1996 200 MHz Pentium, 300 MHz Pentium 2

1997 233 MHz Pentium

1998 266 MHz Pentium, 450 MHz Pentium 2, 400 MHz Pentium 2 Xeon

1999 800 MHz Pentium, 500 MHz Pentium 2, 600 MHz Pentium 3, 733 MHz Pentium 2 Xeon

2000 700 MHz Pentium 2, 1 GHz Pentium 3 and 4, 933 MHz Pentium 2 Xeon

2001 1.2 GHz Pentium 2, 700 MHz Pentium 3, 2 GHz Pentium 3 Xeon and Pentium 4

2002 1.33 GHZ Pentium 2, 1.4 GHz Pentium 3, 2.8 GHz Pentium 3 Xeon, 3.06 GHz Pentium 4

2003 1.7 GHz Pentium, 3.1 GHz Pentium 3 Xeon, 3.2 GHz Pentium 4

2004 2.1 GHz Pentium, 3.8 GHz Pentium 4

2005

2006

2007

2008

2009

Microprocessor Milestones
B. Motorola/Freescale micros

Year Motorola/Freescale Micros (Max frequency)

1974 6800 (8 bit)

1975 1 MHz 6800

1978

1979 2 MHz 6809,? MHz 68000 (16 bit)

1980

1981

1982

1984

1985

1986

1987 16 MHz 68020 (32 bit)

1988 25 MHz 68030 (32 bit)

1989

1990

1991 25 MHz 68040 (32 bit)

1992

1993 66 MHz PowerPC (PPC) 601 (32/64 bit)

1994 100 MHz PPC 604

1995

1996 240 MHz PPC 603

1997 300 MHz PPC 603, 350 MHz PPC 604, 333 MHz PPC 740, 400 MHz PPC 750

1998 233 MHz PPC G3– #??

1999 333 MHz PPC G3, 500 MHz PPC 7400 (G4)

2000

2001 733 MHz PPC 7450

2002 1 GHz PPC 7455

2003 1 GHz PPC 7447, 1.3 GHz PPC 7457

2004 1.42 GHz PPC 7447A

2005

2006

2007

2008

2009

Microprocessor Milestones
C. System Interfaces

Year New System (Mezzanine and Mobile) Buses/Fabrics

1974 Multibus, Q-Bus, Exorbus (iSBX)

1975 S-100

1978 STD Bus

1979 Versabus

1980 G64

1981 PC, VMEbus

1982

1984 PC/AT [aka ISA], G96

1985 Multibus II, VAX BI

1986 STE (M Module)

1987 MCA, NuBus, Futurebus, FASTbus

1988 EISA

1989 VME64 (IP, S-Bus, Turbochannel),

1990 STD32 (PCMCIA)

1991 Futurebus+

1992 PC/104, VL Bus

1993 PCI

1994 PICMG 1.0

1995 66 MHz PCI, CompactPCI, CardBus (PMC)

1996 AGP, CompactPCI

1997 PC/104-Plus, VME64x, EBX

1998 AGP 2.0(PC MIP)

1999 PCI-X (PPMC)

2000 (PTMC)/InfiniBand, StarFabric

2001 PMC-X/HyperTransport

2002 AGP 3.0, PICMG 1.2/PCI Express, RapidIO

2003 PCI-X 2.0, 2eSST VME

2004 Epic (AMC, XMC)

2005

2006

2007

2008

2009

************************************************

Let’s call a spade a spade!

8/24/09

I’m a student of language and am always interested to see how words evolve and change over time. Some of your web sites, I see, have now changed the meaning of “white paper,” which used to mean a backgrounder or tutorial intended to put a company’s offerings in perspective.

Some of the “WPs” I recently came across were what used to be called “app notes,” pure and simple. You probably remember those. They’re now WPs. Some of the WPs I saw were slick marketing glossies, some of which meet the requirements to be WPs but somehow seem too slick and/or blatantly self serving to fit in the class. It seems that WP, which has a respectable sound to it (like white collar), is destined to become a catchall for any document that companies can’t find another label for.*

While on the language issue, please expunge the word “solution” from all of your future press materials. How many editors at how many publications have thrown away how many press releases on “solutions” whose nature remained a mystery well into paragraph #3?

Is your solution software? Hardware? Both? I make a plea for directness and clarity in your materials. Let’s call a spade a spade, eh?

-dl

______________________________________

*We’re well aware that sentences traditionally should not end with a preposition. The editor, however, insists that this rule has been revoked, though he won’t tell who revoked it, and he notes that the phrase “to go with” has a long and respected history in Chicago which will endure forever or at least until the Cubs win the World Series.

**************************************

Introducing Open Architecture Review:
The Ray, Dave, Loring and Terry Show
8/3/09

We’re back, “we” being three editorial caballeros from the former glory days of EETimes, plus one benign sage named Ray Alderman (very Gandalf like), who stands at the tiller as publisher and editorial director.* You may aptly call us old timers. If you add up the ages of the three editors alone–Loring Wirbel, Terry Costlow and myself (Dave Lieberman)—-you’ll get to more than 1000 dog years, and I think we have spent about 90 man years among us researching and writing about embedded computing and other hi tech arenas.

We’re hoping that our new creation, Open Architecture Review, is the right kind of pub for this turbulent era of journalism in crisis. The old business models of print journalism are failing, crushed in part by newer on-line models, which are as yet anything but mature. In this era of rapid (and often vapid) electronic proliferation and regurgitation of the written word, what kind of publication makes sense? we asked ourselves. What sort of webpub, ezine, or whatever you call it would offer real value?

A window, we answered. A funnel. A review. The mission of Open Architecture Review, then, is to funnel a mass of newsworthy information to you in short bites, packaged with the hot links to get you to a more complete story, if it’s of interest to you. The efficient use of your reading time is our goal.

Simultaneously, we will be building our archives and library with various kinds of resource materials, including reviews of white papers and current magazine articles, value-added features, research results and analyses, debates, interviews, application snapshots, charts, tables, reference lists, etc., hoping to eventually become your first stop on the Internet for reading about embedded computing. Even when we provide more or less conventional editorial content, we’ll keep it pithier than the norm to optimize your reading-time investment and let you know where to go to explore further.

Open Architecture Review is kicking off with very modest offerings, but we will evolve over time, becoming both deeper and broader, and we’d like that evolution to be flexible and interactive.  As we begin this journey together to create a new kind of epub, know that you are always welcome to suggest directions, projects and topics of interest to our editorial staff. 

Dave Lieberman

Editor

_______________________________

*We are very aware that “caballeros” and “tiller” together represent a mixed metaphor. That is, the three editors should be “sailors” (to mesh logically with “tiller”), OR Ray should be holding the “reins” (to go with “caballeros”). But the editor says he actually likes mixed metaphors and, anyway, he won’t let ANYONE change his copy.